3.15.4 Bias-Dependent Overlap Capacitance Model

An accurate overlap capacitance model is essential. This is especially true for the drain side where the effect of the capacitance is amplified by the transistor gain. The overlap capacitance changes with gate to source and gate to drain biases. In LDD MOSFETs a substantial portion of the LDD region can be depleted, both in the vertical and lateral directions. This can lead to a large reduction of the overlap capacitance. This LDD region can be in accumulation or depletion. We use a single equation for both regions by using such smoothing parameters as $V_{gs,overlap}$ and $V_{gd,overlap}$ for the source and drain side, respectively. Unlike the case with the intrinsic capacitance, the overlap capacitances are reciprocal. In other words, $C_{gs,overlap} = C_{sg,overlap}$ and $C_{gd,overlap} = C_{dg,overlap}$. The bias-dependent overlap capacitance model in BSIM-CMG is adopted from BSIM4 [10] for $CGEOMOD = 0$ and $CGEOMOD = 2$.

The overlap charge is given by:

$\begin{aligned} \dfrac{Q_{gs,ov}}{NFIN_{total} \cdot W_{effCV}} &= CGSO \cdot V_{gs} + \\ CGSL \cdot \Bigg[ V_{gs} - V_{fbsd} &- V_{gs,overlap} - \dfrac{CKAPPAS}{2} \cdot \Bigg( \sqrt{1 - \dfrac{4 V_{gs,overlap}}{CKAPPAS}} - 1 \Bigg) \Bigg] \end{aligned} \qquad (3.477)$

$\begin{aligned} \dfrac{Q_{gd,ov}}{NFIN_{total} \cdot W_{effCV}} &= CGDO \cdot V_{gd} + \\ CGDL \cdot \Bigg[ V_{gd} - V_{fbsd} &- V_{gd,overlap} - \dfrac{CKAPPAD}{2} \cdot \Bigg( \sqrt{1 - \dfrac{4 V_{gd,overlap}}{CKAPPAD}} - 1 \Bigg) \Bigg] \end{aligned} \qquad (3.478)$

$V_{gs,overlap} = \dfrac{1}{2} \Big[ V_{gs} - V_{fbsd} + \delta_1 - \sqrt{(V_{gs} - V_{fbsd} + \delta_1)^2 + 4 \delta_1} \Big] \qquad (3.479)$

$V_{gd,overlap} = \dfrac{1}{2} \Big[ V_{gd} - V_{fbsd} + \delta_1 - \sqrt{(V_{gd} - V_{fbsd} + \delta_1)^2 + 4 \delta_1} \Big] \qquad (3.480)$

$\delta_1 = 0.02 V \qquad (3.481)$

For $CGEOMOD = 1$, the overlap capacitors are bias-independent, as we will discuss in the end of this section.

References

[10] BSIM4 model. Department of Electrical Engineering and Computer Science, UC Berkeley.