• BSIM-CMG Technical Manual
  • Technical Manual of BSIM-CMG
  • Table of Contents
  • 1 Introduction
  • 2 Model Description
  • 3 Model Equations
    • 3.1 Bias-Independent Calculations
      • 3.1.1 Physical Constants
      • 3.1.2 Effective Channel Width, Channel Length and Fin Number
      • 3.1.3 Geometry-Dependent Source/Drain Resistances
      • 3.1.4 Quantum Mechanical Effects
      • 3.1.5 Binning Calculations
      • 3.1.6 NFIN Scaling Equations
      • 3.1.7 Length Scaling Equations
      • 3.1.8 Temperature Effects
      • 3.1.9 Body Doping and Gate Workfunction
      • 3.1.10 Short Channel Effects
    • 3.2 Terminal Voltages
    • 3.3 Short Channel Effects
      • 3.3.1 Weighting Function for Forward and Reverse Modes
      • 3.3.2 Asymmetric Parameters
      • 3.3.3 Vth Roll-Off, DIBL, and Subthreshold Slope Degradation
    • 3.4 Surface Potential Calculation
      • 3.4.1 Quantum Mechanical Vt correction
      • 3.4.2 Voltage Limiting for Accumulation
      • 3.4.3 Source Side Potential and Charge Calculation
    • 3.5 Drain Saturation Voltage
      • 3.5.1 Drain Saturation Voltage Calculations
      • 3.5.2 Drain Side Potential and Charge Calculations
    • 3.6 Average Potential, Charge and Related Variables
    • 3.7 Quantum Mechanical Effects
      • 3.7.1 Charge Centroid Calculation for Inversion
      • 3.7.2 Effective Width Model
      • 3.7.3 Effective Oxide Thickness / Effective Capacitance
      • 3.7.4 Charge Centroid Calculation for Accumulation
    • 3.8 Mobility Degradation and Series Resistance
      • 3.8.1 Mobility Degradation
      • 3.8.2 Series Resistance
    • 3.9 Lateral Non-Uniform Doping Model
    • 3.10 Body Effect Model
    • 3.11 Output Conductance
      • 3.11.1 Channel Length Modulation
      • 3.11.2 Output Conductance Due to DIBL
    • 3.12 Velocity Saturation
      • 3.12.1 Current Degradation Due to Velocity Saturation
      • 3.12.2 Non-Saturation Effect
    • 3.13 Drain Current Model
    • 3.14 Intrinsic Capacitance Model
      • 3.14.1 Mobility
      • 3.14.2 Velocity Saturation
      • 3.14.3 Channel Length Modulation
      • 3.14.4 Accumulation Charge
      • 3.14.5 Surface Potential Evaluation
      • 3.14.6 Terminal Charges
    • 3.15 Parasitic Resistances and Capacitance Models
      • 3.15.1 Parasitic Resistance Model
      • 3.15.2 Diffusion Resistance
        • 3.15.2.1 Sheet Resistance Model
        • 3.15.2.2 Diffusion Resistance Model for Variability Modeling
      • 3.15.3 Gate Electrode Resistance Model
      • 3.15.4 Bias-Dependent Overlap Capacitance Model
      • 3.15.5 Substrate Parasitics
      • 3.15.6 Fringe Capacitances and Capacitance Model Selectors
    • 3.16 Impact Ionization and GIDL/GISL Model
      • 3.16.1 Impact Ionization Current
      • 3.16.2 Gate-Induced-Drain/Source-Leakage Current
    • 3.17 Gate Tunneling Current
      • 3.17.1 Gate-to-Body Current
      • 3.17.2 Gate-to-Channel Current
      • 3.17.3 Gate-to-Source/Drain Current
    • 3.18 Non-Quasi-Static Models
      • 3.18.1 Gate Resistance Model
      • 3.18.2 Charge Deficit Model
    • 3.19 Generation-Recombination Component
    • 3.20 Junction Current and Capacitances
      • 3.20.1 Source Side Junction Current
      • 3.20.2 Drain Side Junction Current
      • 3.20.3 Source Side Junction Capacitance
      • 3.20.4 Two-Step Source Side Junction Capacitance
      • 3.20.5 Drain Side Junction Capacitance
      • 3.20.6 Two-Step Drain Side Junction Capacitance
    • 3.21 Self-Heating Model
      • 3.21.1 Thermal Resistance and Capacitance Calculations
    • 3.22 Noise Models
      • 3.22.1 Flicker Noise Model
      • 3.22.2 Thermal Noise Model (TNOIMOD = 0)
      • 3.22.3 Thermal Noise Model (TNOIMOD = 1)
      • 3.22.4 Gate Current Shot Noise
      • 3.22.5 Resistor Noise
    • 3.23 Threshold Voltage
  • 4 Simulation Outputs
  • 5 Parameter Extraction Procedure
    • 5.1 Global Parameter Extraction
      • 5.1.1 Basic Device Parameter List
    • 5.2 Parameter Initialization
    • 5.3 Linear Region
    • 5.4 Saturation Region
    • 5.5 Other Parameters Representing Important Physical Effects
    • 5.6 Smoothing Between Linear and Saturation Regions
    • 5.7 Other Effects
  • 6 Local Parameter Extraction for CV-IV
  • 7 Complete Parameter List
    • 7.1 Instance Parameters
    • 7.2 Model Controllers and Process Parameters
    • 7.3 Basic Model Parameters
      • 7.3.1 Part 1
      • 7.3.2 Part 2
      • 7.3.3 Part 3
      • 7.3.4 Part 4
    • 7.4 Parameters for Geometry-Dependent Parasitics
    • 7.5 Parameters for Temperature Dependence and Self-Heating
    • 7.6 Parameters for Variability Modeling
  • 8 Built-in Model Operating Point Outputs
    • 8.1 Outputs with __INFO__ Enabled
      • 8.1.1 Outputs with __INFO__ Enabled - Part 1
      • 8.1.2 Outputs with __INFO__ Enabled - Part 2
    • 8.2 Outputs with __INFO__ and __DEBUG__ Enabled
    • 8.3 Outputs with __INFO__ and __DEBUG__ and __SHMOD__ Enabled
  • 9 History of BSIM-CMG Models
  • Acknowledgments
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3 Model Equations

3 Model Equations

  • 3.1 Bias-Independent Calculations
  • 3.2 Terminal Voltages
  • 3.3 Short Channel Effects
  • 3.4 Surface Potential Calculation
  • 3.5 Drain Saturation Voltage
  • 3.6 Average Potential, Charge and Related Variables
  • 3.7 Quantum Mechanical Effects
  • 3.8 Mobility Degradation and Series Resistance
  • 3.9 Lateral Non-Uniform Doping Model
  • 3.10 Body Effect Model
  • 3.11 Output Conductance
  • 3.12 Velocity Saturation
  • 3.13 Drain Current Model
  • 3.14 Intrinsic Capacitance Model
  • 3.15 Parasitic Resistances and Capacitance Models
  • 3.16 Impact Ionization and GIDL/GISL Model
  • 3.17 Gate Tunneling Current
  • 3.18 Non-Quasi-Static Models
  • 3.19 Generation-Recombination Component
  • 3.20 Junction Current and Capacitances
  • 3.21 Self-Heating Model
  • 3.22 Noise Models
  • 3.23 Threshold Voltage

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